programming/arduino/SKILL.md
Build, review, debug, and scaffold professional Arduino projects across classic AVR boards (`Uno`, `Nano`, `Mega`), Renesas-based R4 boards (`Uno R4 Minima`, `Uno R4 WiFi`, `Nano R4`), ESP32-based Arduino boards, and other common Arduino-family targets. Use when asked for sketches, `.ino` files, Arduino IDE 2, Arduino CLI, PlatformIO, or Arduino Cloud workflows, board-specific pin maps, wiring/BOM notes, unit tests, debug plans, upload/serial monitor troubleshooting, or refactors that must stay practical on real hardware.
npx skillsauth add aeondave/malskill arduinoInstall this skill globally with one command. Works with Claude Code, Cursor, and Windsurf.
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This skill is for end-to-end Arduino work that must survive contact with real hardware: board selection, wiring, firmware structure, PlatformIO, testing, debugging, and troubleshooting.
If the task is mainly about choosing sensors or dealing with noisy detection in robotics/domotica, also load sensors.
Lock the target board, toolchain, and capability profile.
Arduino Uno, Uno R4 WiFi, Nano ESP32, ESP32 Dev Module, etc.Arduino IDE 2, Arduino CLI, PlatformIO, or Arduino Cloud.Plan hardware and wiring before code structure.
Choose the right project shape.
.ino only for small sketches or fast experiments.PlatformIO with src/, lib/, include/, and test/..ino preprocessing disappears: add #include <Arduino.h>, proper headers, and forward declarations.Write firmware for bring-up, maintenance, and testability.
millis() scheduling, finite-state machines, or task-style loops over long blocking delay() chains.Define a verification ladder before finishing.
build, upload, monitor, and test steps.Deliver complete output.
Load references/board-families.md for full details. Minimum awareness without loading the reference:
String abuse and large buffers; D0/D1 are serial-sensitive.3.3V logic; be explicit about radio constraints and boot-sensitive pins.while (!Serial) {} blocks autonomous boot; serial port can disappear on reset.Arduino IDE 2, Arduino CLI, or PlatformIO)delay() use is justified or removedPlatformIO config, if present, matches the board and monitor assumptionsPlatformIO board ID, upload protocol, or debugger choice.while (!Serial) {}.Uno R4 WiFi, mention board-specific caveats when they matter: Qwiic is 3.3V on Wire1, HID can change the USB port, and direct ESP32 programming can break the default bridge firmware.lib_deps when the project needs reproducibility.references/project-patterns.md for project shape, architecture, OTA guidance, bring-up flow, and deliverables.references/pin-planning.md when assigning GPIOs, documenting wiring, or checking bus and voltage constraints.references/board-families.md when selecting a board, comparing families, or explaining board-specific caveats.references/platformio-testing-debugging.md when the request mentions PlatformIO, tests, upload issues, serial monitor issues, or debugging.references/project-patterns.md — project intake, architecture, deliverable bundles, and first-power-on workflow.references/pin-planning.md — GPIO planning, voltage-domain checks, bus mapping, and wiring-output format.references/board-families.md — practical differences between AVR, R4, ESP32-based, and native-USB Arduino targets.references/platformio-testing-debugging.md — PlatformIO structure, migration guidance, unit testing, debugging, and troubleshooting.data-ai
Scoped routing: Linux operator; hosts, sessions, users, services, packages, logs, containers, SSH, network paths, privilege evidence.
development
Offensive methodology for ICS/OT/SCADA environments in authorized industrial penetration testing and red team operations. Use when assessing PLCs, RTUs, HMIs, engineering workstations, historians, or field devices running Modbus, DNP3, EtherNet/IP, S7comm/S7+, Profinet, IEC 60870-5-104, BACnet, or OPC-UA. Covers passive OT network enumeration, protocol-level device interrogation, PLC coil/register read-write attacks, HMI session exploitation, historian and engineering workstation compromise, and safe escalation rules for critical infrastructure scope. Does not cover: general IT network exploitation (network-technique), physical hardware interfaces UART/JTAG/SPI (hardware-technique), wireless sensor network attacks (wireless-technique), RF/SDR signal analysis (hardware-ctf or wireless-technique), or CTF-framed ICS lab tasks (ics-ctf).
tools
Offensive methodology for authorized game security assessments, game client security research, and game-adjacent penetration testing in real-world engagements. Use when assessing game clients for cheating vulnerabilities, testing anti-cheat effectiveness, auditing game server protocols for score manipulation or economic fraud, reverse engineering game DRM or license validation, analyzing game save file protection, or assessing game mod/plugin security. Covers: process memory scanning and manipulation (Cheat Engine methodology), game binary reversing for license and DRM bypass, game network protocol analysis and packet replay, anti-cheat mechanism analysis, save file format reversing and tampering, speed hack and value injection techniques. Does NOT cover: CTF game challenges (game-ctf), game engine source code auditing (web-exploit-technique or vuln-search-technique for the backend), or general binary exploitation (pwn-ctf or reversing-technique).
development
Auth assessment: hardware/embedded methodology; UART/JTAG/SWD/SPI/I2C, firmware extraction, boot/debug paths, embedded OS evidence.